Synopsys 2011 用户大会暨技术研讨会
August 3, 2011
北京
日期：2011年8月22日（星期一）
地点：北京香格里拉饭店 一层大宴会厅
地址：北京市紫竹院路29号
日程安排:
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8:15-8:45am
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Registration
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8:45-9:30am
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Welcome – Robert Li, Synopsys China Country ManagerKeynote – Aart de Geus, Synopsys Chairman and CEO
(Ballroom, 1F) |
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9:30-10:00am
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Eco-system partner Keynote speech – Jay Min, Samsung VP of foundry business(Ballroom, 1F)
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10:00-10:15am
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SNUG Award Ceremony
(Ballroom, 1F) |
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10:15-10:30am
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Break
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Galaxy (Ballroom I, 1F)
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Discovery (Ballroom II, 1F)
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Time to Market solutions (Ballroom III, 1F)
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SNUG Award Paper (Lotus, 2F)
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10:30-11:15am
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Galaxy Overview |
10:30-11:30am
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Functional Verification Overview |
10:30-11:25am
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AMSG: CustomSim |
10:30-11:10am
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SNUG Paper #1 | ||
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11:25-11:45am
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AMSG: Demo |
11:10-11:50am
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SNUG Paper #2 | ||||||
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11:15-1:00pm
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Lunch (Event center) | 11:30-1:00pm | Lunch (Event center) | 11:45-1:00pm | Lunch (Event center) | 11:50-1:00pm | Lunch (Event center) | ||
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1:00-2:15pm
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RTL Synthesis & Test Overview |
1:00-2:15pm
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VCS Update |
1:00-1:20pm
|
Lynx Success story |
1:00-1:40pm
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SNUG Paper #3 | ||
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1:20-2:00pm
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Lynx Demo |
1:40-2:20pm
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SNUG Paper #4 | ||||||
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2:15-4:00pm
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Physical Design & Verification |
2:15-3:15pm
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Advanced Verification Technologies |
2:00-2:45pm
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IP: MIPI |
2:20-3:00pm
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SNUG Paper #5 | ||
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2:45-3:25pm
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IP: DDR | ||||||||
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3:15-3:45pm
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New SystemVerilog VIP |
3:25-3:55pm
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IP: USB 3.0 | ||||||
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4:00-4:15pm
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Break | 3:45-4:00pm | Break | 3:55-4:10pm | Break | ||||
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4:15-6:00pm
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Signoff | 4:00-4:45pm | Low Power Verification | 4:10-4:35pm | IP: HDMI | ||||
| 4:45-5:15pm | Methodology Update (UVM, VMM, etc) | 4:35-5:35pm | ARM tutorial: Enabling Delivery of High-Performance ARM Cortex-A Series Processor Cores | ||||||
| 5:15-5:45pm | Mixed-Abstraction Verification | ||||||||
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6:00-6:15pm
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Conclusion & Prize Draw (Ballroom, 1F)
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联系人：李柯含
邮件：kehan@synopsys.com
电话：010-5986 0682
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上海
时间：2011年8月24日（星期三）
地点：上海龙之梦丽晶大酒店 四层大宴会厅
地址：上海市长宁区延安西路1116号
日程安排:
|
8:15-8:45am
|
Registration
|
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|
8:45-9:30am
|
Welcome – Robert Li, Synopsys China Country ManagerKeynote – Aart de Geus, Synopsys Chairman and CEO
(Ballroom, 4F) |
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9:30-10:00am
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Eco-system partner Keynote speech: 陈家湘/C.H.Chen, 台积电(中国)总经理/President
(Ballroom, 4F) |
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10:00-10:15am
|
SNUG Award Ceremony
(Ballroom, 1F) |
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10:15-10:30am
|
Break
|
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|
Galaxy (Ballroom A, 4F)
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Discovery (Banyan+Maple, 4F)
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Time to Market solutions (Ballroom B, 4F)
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SNUG Award Paper (Ballroom C, 4F)
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10:30-11:15am
|
Galaxy Overview |
10:30-11:30am
|
Functional Verification Overview |
10:30-11:25am
|
AMSG: Hspice |
10:30-11:10am
|
SNUG Paper #1 | ||
|
11:25-11:45am
|
AMSG: Demo |
11:10-11:50am
|
SNUG Paper #2 | ||||||
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11:15-1:00pm
|
Lunch (2F) | 11:30-1:00pm | Lunch (2F) | 11:45-1:00pm | Lunch (2F) | 11:50-1:00pm | Lunch (2F) | ||
|
1:00-2:15pm
|
RTL Synthesis & Test Overview |
1:00-2:15pm
|
VCS Update |
1:00-1:20pm
|
Lynx Success story |
1:00-1:40pm
|
SNUG Paper #3 | ||
|
1:20-2:00pm
|
Lynx Demo |
1:40-2:20pm
|
SNUG Paper #4 | ||||||
|
2:15-4:00pm
|
Physical Design & Verification |
2:15-3:15pm
|
Advanced Verification Technologies |
2:00-2:45pm
|
IP: MIPI |
2:20-3:00pm
|
SNUG Paper #5 | ||
|
2:45-3:25pm
|
IP: DDR | ||||||||
|
3:15-3:45pm
|
New SystemVerilog VIP |
3:25-3:55pm
|
IP: USB 3.0 | ||||||
|
4:00-4:15pm
|
Break | 3:45-4:00pm | Break | 3:55-4:10pm | Break | ||||
|
4:15-6:00pm
|
Signoff | 4:00-4:45pm | Low Power Verification | 4:10-4:35pm | IP: HDMI | ||||
| 4:45-5:15pm | Methodology Update (UVM, VMM, etc) | 4:35-5:35pm | ARM tutorial: Enabling Delivery of High-Performance ARM Cortex-A Series Processor Cores | ||||||
| 5:15-5:45pm | Mixed-Abstraction Verification | ||||||||
|
6:00-6:15pm
|
Conclusion & Prize Draw (Ballroom A, 4F)
|
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| R&D Night – Shanghai only | |||||||||
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6:45-8:45pm
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R&D Night (Ballroom B+C, 4F)
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联系人：仲蔚
邮件：Wei.Zhong@synopsys.com
电话：021-2307 2297
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深圳
日期：2011年8月30日（星期二）
地点：深圳威尼斯皇冠假日酒店 一层大宴会厅
地址：深圳市华侨城深南大道9026号
日程安排：
|
8:15-8:45am
|
Registration
|
||||||||
|
8:45-9:30am
|
Welcome – Robert Li, Synopsys China Country ManagerKeynote – Don Chan, Synopsys Vice President of Corporate Applications Engineering
(Ballroom, 1F) |
||||||||
|
9:30-10:00am
|
Eco-system partner Keynote speech (Ballroom, 1F)
|
||||||||
|
10:00-10:15am
|
SNUG Award ceremony (Ballroom, 1F)
|
||||||||
|
10:15-10:30am
|
Break
|
||||||||
|
Galaxy (Ballroom I, 1F)
|
Discovery (Roma, 1F)
|
Time to Market solutions (Tivoli, 3F)
|
|||||||
|
10:30-11:50am
|
Galaxy Overview |
10:30-11:30am
|
Functional Verification Overview |
10:30-11:25am
|
AMSG: CustomSim | ||||
|
11:25-11:45am
|
AMSG: Demo | ||||||||
|
11:15-1:00pm
|
Lunch (1F) | 11:30-1:00pm | Lunch (1F) | 11:45-1:00pm | Lunch (1F) | ||||
|
1:00-2:15pm
|
RTL Synthesis & Test Overview |
1:00-2:15pm
|
VCS Update |
1:15-2:00pm
|
ARM tutorial: Enabling Delivery of High-Performance ARM Cortex-A Series Processor Cores | ||||
|
2:15-4:00pm
|
Physical Design & Verification |
2:15-3:15pm
|
Advanced Verification Technologies |
2:00-2:20pm
|
Lynx Success story | ||||
|
3:15-3:45pm
|
New SystemVerilog VIP |
2:20-3:00pm
|
Lynx Demo | ||||||
|
4:00-4:15pm
|
Break | 3:45-4:00pm | Break | ||||||
|
4:15-6:00pm
|
Signoff | 4:00-4:45pm | Low Power Verification | ||||||
| 4:45-5:15pm | Methodology Update (UVM, VMM, etc) | ||||||||
| 5:15-6:00pm | Mixed-Abstraction Verification | ||||||||
|
6:00-5:45pm
|
Conclusion & Prize Draw
|
||||||||
联系人：王懿
邮件：jojowang@synopsys.com
电话：0755-82519830
Insight China
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SNUG
-
White Paper
-
Good Chip Series
