2006论文集

Static Timing Verification for Complex SoC Design
- Application of “Internal Path”Approach

The Application of PrimeRail for Dynamic IR-Drop Analysis In Godson-II Design

Building Scalable, Unified, Reusable Verification Platform for Complex SoCs Using Synopsys’ Vera and RVM

Design for Test with DFT-MAX Adaptive Scan in low power design

OPC Parameter Optimization Based on Design Hierarchy

解决深亚微米时序收敛问题的一种方法

利用RVM 搭建TD-SCDMA 终端芯片的高效验证平台

使用VIP 加速SoC 芯片验证流程

NIV on full chip simulation of mixed signal designs

龙芯2E 处理器可测试性设计