2009论文集
获一等奖论文
A migration from Vera to SystemVerilog in a stepped 3 approach Part II
获二等奖论文
Test Point Insertion for Test Coverage Improvement in DFT
获三等奖论文
RTL Verification of DVS, Standby, Power gating in WLAN SoC Using UPF
基于VMM和VMM Applications构建可重用验证环境的方法
一种利用IC Compiler实现复杂情况下off-track布线的方法
利用扫描链压缩技术与多测试时钟设计实现低功耗ATPG测试的方法
HSIM, XA及其与VCS的混合验证方案在RF收发器芯片中的应用
纪念奖论文
Improve Verification Productivity with Synopsys Coverage Convergence Technology
Using Separate Compile Technology to Improve VCS Compile Performance
Using Synopsys Magellan and AIP to Verify OCP2AHB Bridge
基于Synopsys HAPS解决方案的大规模SoC原型验证
Low Power Cells Liberty Characterization with Liberty NCX
Predicting and Minimizing Routing Congestion in Synthesis Stage
使用层次自适应扫描压缩技术减少运行时间、降低测试向量和测试成本的方法
Transistor Level STA and SI Analysis with NanoTime on Custom Digital Blocks
利用PrimeTime PX对ZTEIC RFID进行功耗分析的方法
Accelerated Mixed-signal Full Chip Verification with XA-VCS
Analyzing and Optimizing A High Speed Transeiver Design Using HSIM and Cosmos Scope
The Application of Custom Designer in Godson3 Project
XA-VCS co-simulation of Mixed Signal designs
A Systematic Way From Spec to an Executable Verification Plan
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