Abstract

First of all, this paper introduces new Synopsys AMS solution – Custom designer, which delivers a user interface familiar with other main-stream layout editors while integrating a common use model for simulation, analysis, parasitic extraction and physical verification. It is the first-ever implementation solution built natively on the OpenAccess database for legacy designs as well as a new componentized infrastructure offering unprecedented openness and interoperability with process design kits (PDKs) from leading foundries.

Secondly, this paper shares some experiences about Custom Designer integration with Synopsys tools such as HSIM/xa, Waveview. Also shares some experiences about the database transition using Custom Designer such as stream in/out huge size GDSII and DEF/LEF file in our Godson 3 project.

1. Introduction

Custom Designer is the Synopsys full custom front-to-back design environment enabling users to meet the design challenges of today’s fast-moving nanometer circuits. As the first user of the north China, we can share some experiences about this environment.

This is the diagram of Synopsys full custom front to back end design environment. From this diagram, we can see that we use Custom Designer SE generate the schematic .and use the golden simulator HSPICE for block level simulation. We can Cross-probing the waveform with the WaveView Analyzer. When we think the pre-simulation result is ok for layout. We can use Custom Designer LE for layout. About Layout we can invoke IPDK for schematic driving layout. Custom Designer LE can invoke Hercules or Calibre for DRC, LVS ERC check. The result can be highlight in the layout. Custom Designer LE can invoke StarRCXT for RC extraction. The parasitic RC can be back annotated to the layout. We can use HSIM/Nanosim/XA for hierarchical post-layout simulation before merged with digital block. Custom Designer LE has the link with ICC, So digital and analog blocks can be merged together before final taping out.

2. Godson 3 Description

Godson-3 is the third generation of the Godson microprocessor series, a project of the Institute of Computing Technology at the Chinese Academy of Sciences. As a multi-core processor, Godson-3 targets high-throughput server applications, high performance scientific computing, and high-end embedded applications.Godson-3’s scalable and distributed on chip network connects processor cores and globally addressed level-two (L2) cache modules. A directory-based cache-coherence protocol maintains multiple level-one (L1) copies of the same L2 block. Godson-3’s MIPS64-compatible superscalar reduced instruction-set-computing (RISC) processor core is designed for high performance and low power dissipation. It also supports efficient x86 to MIPS binary translation through dedicated hardware support. Godson-3 adopts the scalable mesh of crossbar (SMOC) on-chip network topology. Using the SMOC architecture, a 2 2 mesh network can support a 16-core processor, and a4 4 mesh network can support a 64-core processor. We’ve already defined the four eight, and 16-core product chips, and we’ve designed and fabricated four-core Godson-3 based on 65-nm CMOS technology. The eight- and 16-core Godson-3 are still in physical implementation.

3. Data Transfer Using Custom Designer

I. GDSIN

Our project uses ICC for placing & routing. We need use physical verification sign-off tool such as Hercules or Calibre for DRC/LVS sign-off checking. Always we select a full custom layout editor for DRC/LVS debugging. The final GDSII of our project is 11Gb, How can we speed up the GDSII stream In? Before try Custom Designer, We use another layout editor for stream In, The speed is slowly, It need more than an hour for stream in the 11Gb Database. With the custom Designer layout editor, the total stream In speed is about 12 minutes. The flow about the Stream In with the custom Designer is as following:

The first step of stream in is Create Library, as another layout editor, we need attach the technology file to the new library. The technology file can be found from the Foundry. If we only has the MW technology file, Custom Designer can’t use this technology file directly, we can ask Synopsys engineer to help us to translate the MW technology file to the OA (Open Access) technology. Also, they can deliver us the display.tcl file, layer.map file at the same time.

Second step, We need stream in the GDSII file to the library. Also we need add the layer.map file to the Map files. We can find information: “stream import finished successfully” when we finish the stream In GDSII.

II. DEF/LEF IN

DEF/LEF In is often used in full custom layout editor. In our projects, we need read more than 50 DEF LEF files. About this flow, Custom Designer Layout editor has good speed as well. The flow of DEF/LEF in is as following

The first step is same as GDSII stream In. It is Create Library.

The second step is DEF/LEF In. If the Lef file is not too much, we can use the GUI mode to stream In DEF/LEF files one by one. The technology LEF file is the first LEF file in the all of the LEF files.

Because there are over 50 LEF files in our design, we write a script to stream in the DEF/LEF files one by one. The description is as following:

Lef2oa –logFile importLef.log –lib XXX –dataModel 3 –lef ../lef/XX.lef -view abstract –layoutView layout –commenChar # -pinLabls –textLayer text –testHeight 20

…..

This description can be found in the importLef.log file, you can revise the description according your design.

4. Custom Designer Front End Design Environment

Synopsys has many excellent transistor level simulators, such as HSPICE, HSIM. According different design we will select different simulator to get accurate and speed trade off. Custom Designer front end design environment include the Custom Designer Schematic Editor, NTI (netlist based tools integration) and WaveView analyzer.

Our Projects use Synopsys Simulators for block level and full chip simulation. Custom Designer front end simulation environment is easy to use. The Schematic Editor has a netlist based simulation interface which can be used to simulate your design. Custom Designer has integrated the Synopsys simulators HSPICE, NanoSim, HSIM and XA. It is easy to initialize the simulation tool by loading or creating a run directory. Once initialized, the menus are enabled allowing the user to edit inputs, generate a netlist run a simulation and analyze the results. Inputs can be edited through a text editor using the Simulation->Inputs menu picks.

5. Conclusion

Synopsys Custom Designer is the full custom front to back design environment. It is easy to use and very useful for our full custom design.