How to Use Synopsys Tools to Improve Scan Fault Coverage to Automotive Level
Frank Yangfrank.yang@analog.com
Prance Zhangprance.zhang@analog.com
Analog Devices
Abstract
One of key challenges for automotive product is high quality. Automotive customers require that customer return rates are 0 or single-digit ppm. In order to meet this requirement, scan fault coverage of digital circuits must be greater than 98%. For safety critical products it must be greater than 98.5%.
This paper describes how we use Synopsys tools to improve the scan fault coverage of our automotive product from <95% to >98.5%. We developed a flow which makes sure the scan test coverage can meet automotive requirement. The flow consists of, Coding with DFT best practice -> RTL DFT-DRC check & update -> 2-pass synthesis (DCT->TMAX->DCT) DFT implementation -> Insert defined observe options to reduce coverage loss after CTS -> Combined functional and ATPG patterns -> Use Hierarchy Browser to analyze coverage issue. The flow will be introduced in detail in this paper.
High test coverage will lead to reduced customer returns across our full portfolio of products, not just automotive products. The methodology, flow and measures proposed and practiced can be reused by other projects to achieve this.
1. Scan Coverage Requirement for Automotive
AEC defines the specification for the scan coverage requirement for the automotive product. The specification is AEC-Q100-007. The detailed requirements as the below table
The safety critical product requires that stuck-at fault coverage is greater than 98.5%. Our automotive product requires 98.5% scan coverage. It’s one of the key challenges of development.
2. The Methodology for High Scan Coverage
We developed a flow that ensures the scan test coverage can meet automotive requirements. Figure 1 shows the high scan coverage flow.
Figure 1 : High Scan Coverage Flow
Key points for the flow as follows:
• Use DFT-DRC to check RTL and fix the DFT-DRC violations
• Two pass synthesis: In the first synthesis, do not insert the observe points. Run the TMAX test point analysis to decide the optimal location of inserting observe points. The second synthesis inserts observe points based on the TMAX analysis
• Insert observe points for scan clock MUX to stop the coverage drop after CTS
• Add the functional pattern to detect the faults which ATPG pattern cannot detect.
• Use the TMAX Hierarchy Browser to analyze the coverage issue
2.1 Detailed High Scan Coverage Flow
2.1.1 DFT-DRC Checking
Figure 2 shows the DFT-DRC checking flow.
Figure 2: DFT-DRC Checking Flow
An example DFT-DRC check report as follows.
Coverage results after updating RTL code to fix the DFT-DRC violations.
Table 1: Result after Updating RTL for DFT-DRC
2.1.2 Two Pass Synthesis Flow
Figure 3: 2 Pass Synthesis Flow
TMAX run_testpoint_analysis can determine the optimal location to insert ob flow to insert observe points.
2.1.3 Insert Observe Point to Stop Coverage Drop after CTS
There was ~ 0.5% coverage drop after CTS for the original design. We investigated this issue. The root cause was that the buffer trees before scan MUX were undetectable. Figure 4 shows this.
Figure 4: Coverage Drop after CTS
Solution for this issue is inserting observe points before the scan MUX.
Figure 5: Solution for Coverage Drop after CTS
Coverage results after adding observe points for CTS coverage drop as the below table.
Table 2: Results after Adding Observe Points for CTS Coverage Drop
2.1.4 Combined Functional and ATPG Pattern
Some faults are undetectable for ATPG. But they are detectable for functional patterns. So we can add functional patterns to improve scan coverage. The flow for combined functional and ATPG patterns as follows.
• Run function simulation to generate the eVCD file for TMAX.
• TMAX pass-1, get ATPG stuck-at coverage
• TMAX pass-2, run faultsim with eVCD to get combined stuck-at coverage
Run time for this flow could be very huge if we use the following flow.
Run time will be fast if we use the optimized flow as follows.
Key point is that TMAX read ATPG faults before run fault simulation for functional pattern.
Coverage results for combined functional and ATPG patterns as below table.
Table 3: Coverage Results of Functional Pattern
2.1.5 Coverage Issue Analysis
We still couldn’t meet scan coverage requirement after we did all the above things. Then we used TMAX hierarchy browser to analyze the coverage issue.
Figure 6: TMAX- Hierarchy Browser
The hierarchy browser displays a design’s basic hierarchy and enables graphical analysis of coverage issues. The tree map shows the coverage information for each module in on hierarchy. Lib cells can show the coverage and fault grading for each instance. We found out the modules with lower fault coverage and analyzed the reason. Then we fixed the issue to improve the fault coverage.
3. Other Measures to Improve Scan Coverage
3.1 Use full-sequential engine
We enabled full-sequential engine for ATPG by the following commands.
set_atpg -full_seq_atpg
Results of different ATPG engines as below table
Table 4: Coverage Results of Different ATPG Engines
3.2 Use the latest version tool
We updated DCT and TMAX from 2008.09 to 2010.03.
The scan coverage increased 0.11%. The detailed results as below table
Table 5: Performance of the Latest Version Too
4. Conclusions and Recommendations
After we used the methodology, flow and measures the scan coverage of our automotive product increased a lot and met the automotive requirements. The below table shows the detailed results
Table 6: Overall Scan Coverage Results after Optimization
From our practices the most efficient ways to improve scan coverage as follows.
• Update RTL code to fix DFT-DRC violations
• Add functional pattern
• Add observe points intelligently
• Use full-sequential ATPG engine
• Use the latest Synopsys tools
5. Acknowledgements
Thanks for Pat Crowe, Shaun Bradley, Brian O’Mara and Grant Li for positive feedback and suggestions.
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